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  ? semiconductor components industries, llc, 2015 june, 2015 ? rev. p3 1 publication order number: NCV890430/d NCV890430 product preview 0.6 a 2 mhz 100% duty cycle step\down synchronous regulator for automotive the NCV890430 is a fixed-frequency synchronous buck regulator intended for automotive, battery-connected applications that operate with up to a 45 v input supply. it is suitable for automotive systems with high efficiency, low noise and low shutdown current requirements that also need to operate at low input voltage close to the output voltage. a reset pin (with adjustable delay) simplifies interfacing with a microcontroller. this part also features an enable input that can either be connected to a low voltage (such as a micro-controller output) or high voltage (such as the battery input), and a synchronization input. the NCV890430 also provides several protection features expected in automotive power supply systems such as current limit, short circuit protection, and thermal shutdown. in addition, the high switching frequency produces low output voltage ripple even when using small inductor values and all-ceramic input output filter capacitors ? forming a space-efficient switching regulator solution features ? internal 500 m  p-channel and 250 m  n-channel power switches ? capable of 100% duty cycle operation ? v in operating range 3.5 v to 37 v ? withstands load dump to 45 v ? 2 mhz free-running switching frequency ? low shutdown current < 10  a ? high voltage enable pin ? synchronization input pin ? dc output current of at least 0.6 a ? fixed output voltage (5 v, 3.3 v, 2.5 v versions) ? 2% output voltage accuracy ? dfn package with wettable flanks (pin edge plating per jedec mo220) ? ncv prefix for automotive requiring site and control changes ? these are pb?free devices typical applications ? automotive infotainment and instrumentation ? automotive body applications ? linear regulator replacement ? rear view camera this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. www. onsemi.com dfn8, 3x3, 0.65p case 506cs marking diagram pin connections sw pgnd sync vout vin rstb gnd en 18 27 36 45 (dfn8 top view) 1 xxxxx = specific device code (tbd) a = assembly location l = wafer lot y = year w = work week  = pb?free package xxxxxx xxxxxx alyw   1 (note: microdot may be in either location) see detailed ordering, marking and shipping information on page 8 of this data sheet. ordering information
NCV890430 www. onsemi.com 2 figure 1. typical application schematic figure 2. simplified block diagram
NCV890430 www. onsemi.com 3 table 1. pin function descriptions pin no. pin name description 1 vin input voltage from battery. place an input filter capacitor in close proximity to this pin. 2 rstb reset reporting flag. open drain output, pulling down to ground when the output voltage is out of regulation. the value of the external pull-up resistor determines the delay time that the reset is held low. 3 gnd analog ground reference ? should be connected directly to the output capacitor ground and the exposed pad. 4 en enable input. connecting a ?high? voltage (ttl compatible, battery voltage tolerant) to this pin turns on the regulator. a low voltage forces the part into a very low iq shutdown mode. 5 vout output voltage sensing for regulation. 6 sync synchronization input. connecting an external clock to this pin synchronizes switching to the rising edge of the sync signal. 7 pgnd power ground, connect directly to the input capacitor ground and to the exposed pad. 8 sw switching node of the regulator. connect the output inductor to this pin. exposed pad epad must be connected to gnd (pin 3, electrical ground) and to a low thermal resistance path to the ambient temperature environment.. table 2. absolute maximum ratings rating symbol value unit min/max voltage vin ?0.3 to 45 v max voltage vin to sw 45 v min/max voltage sw ?0.7 to 40 v v min voltage sw ? 20 ns ?3.0 v min/max voltage en ?0.3 to 40 v v min/max voltage on sync, rstb ?0.3 to 6 v min/max voltage vout ?0.3 to 18 v thermal resistance, dfn8 junction-to-ambient (note 1) r ja 40 c/w storage temperature range ?55 to +150 c operating junction temperature range t j ?40 to +150 c esd withstand voltage (human body model) v esd 2.0 kv moisture sensitivity msl level 1 peak reflow soldering temperature (note 1) 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. mounted on 1 sq. in. of a 4-layer pcb with 1 oz. copper thickness.
NCV890430 www. onsemi.com 4 table 3. electrical characteristics (v in = 4.5 v to 28 v, en = 5 v. min/max values are valid for the temperature range ?40 c t j 150 c unless noted otherwise, and are guaranteed by test, design or statistical correlation.) parameter test conditions symbol min typ max unit quiescent current quiescent current, enabled v in = 13.2 v i qen 3.0 ma quiescent current, shutdown v in = 13.2 v, v en = 0 v, 25 c i qsd 5.0 8.0  a undervoltage lockout ? vin uvlo start threshold v in rising v uvlstt 4.1 4.5 v uvlo stop threshold v in falling v uvlstp 3.2 3.5 v soft-start soft-start completion time t ss 0.8 1.4 2.0 ms output voltage output voltage during regulation 100  a < i out < 0.6 a 5.0 v option 3.3 v option 2.5 v option v outreg 4.9 3.234 2.45 5.0 3.3 2.5 5.1 3.366 2.55 v oscillator frequency 4.5 v < v in < 18 v 20 v < v in < 28 v f sw f sw(hv) 1.8 0.9 2.0 1.0 2.2 1.1 mhz vbat overvoltage shutdown monitor overvoltage stop threshold v ov1sp 37 40 v overvoltage start threshold v ov1st 34.5 v overvoltage hysteresis v ov1hy 0.9 1.7 2.5 v vin frequency foldback monitor frequency foldback threshold v in rising v in falling v fldup v flddn 18.4 18 20 19.8 v frequency foldback hysteresis v fldhy 0.2 0.3 0.4 v peak current limit current limit threshold i lim 1.5 1.7 1.9 a low-side current limit threshold v sw = 13.2 v i limls 1.2 1.6 2.0 a power switches high-side switch on resistance r dson?hs 1000 m  low-side switch on resistance r dson?ls 550 m  leakage current v in to sw v sw = 0, ?40  c t j 85  c i lkswh 10  a leakage current sw to gnd v sw = v in , ?40  c t j 85  c i lkswl 10  a minimum on time measured at sw pin t onmin 45 70 ns minimum off time when not 100% duty cycle measured at sw pin at f sw = 2 mhz t offmin 30 50 ns non-overlap time t novlp 10 ns slope compensation ramp slope (note 2) (with respect to switch current) 4.5 v < v in < 18 v 20 v < v in < 28 v s ramp s ramp(hv) 1.05 0.5 1.5 0.75 1.95 1.0 a/  s short circuit frequency foldback switching frequency in short-circuit condition lowest foldback frequency lowest foldback frequency ? high v in v out = 0 v, 4.5 v < v in < 18 v v out = 0 v, 20 v NCV890430 www. onsemi.com 5 table 3. electrical characteristics (continued) (v in = 4.5 v to 28 v, en = 5 v. min/max values are valid for the temperature range ?40 c t j 150 c unless noted otherwise, and are guaranteed by test, design or statistical correlation.) parameter unit max typ min symbol test conditions hiccup mode hiccup mode v sw = 0 v f swhic 24 32 40 khz hiccup mode 2 ? sw short to battery v sw = 13.2 v f swhicls 24 32 40 khz synchronization sync input resistance to ground v sync = 5.0 v r h(sync) 50 200 k  sync input high threshold voltage v hsync 2.0 v sync input low threshold voltage v lsync 0.8 v sync high pulse width v sync > max v hsync t hsync 40 ns sync low pulse width v sync < min v lsync t lsync 40 ns external sync frequency f sync 1.8 2.5 mhz master reassertion time time from last rising sync edge to first un-synchronized turn-on. t i(sync) 650 ns reset reset threshold v out decreasing v out increasing k res_lo k res_hi 91 91.5 93 95 97 % reset hysteresis (ratio of vout) k res_hys 0.5 % leakage current into rstb pin 1.0  a noise-filtering delay from v out < v reset to rstb pin going low t res_filt 10 25  s reset delay time i rstb = 1.1 ma i rstb = 500  a i rstb = 100  a t reset 4.0 19 1.0 5.0 24 6.0 29  s ms ms reset delay modes power good mode (no delay) delay mode 1000 600  a reset output low level i rstb = 1.2 ma v resl 0.4 v enable logic low threshold voltage v enlow 0.8 v logic high threshold voltage v enhigh 2.0 v en pin input current i enbias 8.0 30  a thermal shutdown thermal shutdown activation temperature (note 2) t sd 155 190 c hysteresis (note 2) t hys 5.0 20 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. not tested in production. limits are guaranteed by design.
NCV890430 www. onsemi.com 6 typical curves figure 3. typical efficiency vs. output current at v in = 12 v figure 4. typical efficiency vs. input voltage at i out = 0.5 a figure 5. worst case maximum output current vs. input voltage tbd tbd
NCV890430 www. onsemi.com 7 application information general description the NCV890430 is a high-frequency synchronous switch-mode regulator with current-mode control, fixed output voltage and fixed internal closed-loop compensation, accepting a wide input voltage range typical to automotive applications. the use of a p-channel high-side mosfet simplifies the driving scheme (no bootstrap circuitry needed), and enables a duty cycle of 100% for low dropout operation at low input voltage. input voltage an undervoltage lockout (uvlo) circuit monitors the input, and can inhibit switching and reset the soft-start circuit if there is insufficient voltage for proper regulation. depending on the output conditions (voltage option and loading), the NCV890430 may lose regulation and run in drop-out mode before reaching the uvlo threshold: refer to the minimum v in calculation tool for details. when the input voltage drops low enough that the part cannot regulate because it reaches its maximum duty cycle, the high-side mosfet can turn on permanently (100% duty cycle operation), to help lower the minimum voltage at which the regulator loses regulation. an overvoltage monitoring circuit automatically terminates switching if the input voltage exceeds 37 v (see figure 6 ) , but the NCV890430 can withstand input voltages up to 45 v. to avoid skipping switching pulses and enter an uncontrolled mode of operation, the switching frequency is reduced by a factor of 2 when the input voltage exceeds the v in frequency foldback threshold (see figure 6 below). frequency reduction is automatically terminated when the input voltage drops back below the v in frequency foldback threshold. this also helps to limit the power lost in switching and generating the drive voltage for the power switches at high input voltage. figure 6. NCV890430 worst-case switching frequency profile vs. input voltage ??? ??? ??? ??? ??? ??? ??? ??? 100% duty cycle if drop? out mode 2 1 3.5 18 20 34.5 40 45 v in (v) f sw (mhz) soft-start upon being enabled or released from a fault condition, a soft-start circuit ramps the switching regulator error amplifier reference voltage to the final value, forcing the output to follow the same soft-start ramp. during soft-start, the average switching frequency is lower until the output voltage approaches regulation. slope compensation a fixed slope compensation signal is generated internally and added to the sensed current to avoid increased output voltage ripple due to bifurcation of inductor ripple current at duty cycles above 50%. the fixed amplitude of the slope compensation signal requires the inductor to be greater than a minimum value, depending on output voltage, in order to avoid sub-harmonic oscillations. the recommended inductor value is between 1.8 and 3.3  h, although other values are possible. current limiting due to the ripple on the inductor current, the average output current of a buck converter is lower than the peak current set point of the regulator. see ?typical curves? for how the variation of inductor peak current with input voltage affects the maximum dc current the NCV890430 can deliver to a load. short circuit protection during severe output overloads or short circuits, the NCV890430 automatically reduces its switching frequency. this creates duty cycles small enough to limit the peak current in the power components, while maintaining the ability to automatically reestablish the output voltage if the overload is removed. in more severe short-circuit conditions where the inductor current reaches the peak current limit during the minimum on time, the regulator enters a hiccup mode that further reduces the power dissipation and protects the system.
NCV890430 www. onsemi.com 8 reset function the rstb pin is pulled low when the output voltage falls below 8% of the nominal regulation level, and floats when the output is properly regulated. a pull-up resistor tied to the output is needed to generate a logic high signal on this open-drain pin. the pin can be left unconnected when not used. when the output voltage drops out of regulation, the pin goes low after a short noise-filtering delay (k res_filt ). it stays low for a delay time (adjustable) after the output goes back to regulation, simplifying the connection to a micro-controller. the rstb signal can either be used as a reset with delay or a power good (no delay). the delay is determined by the current into the rstb pin, set by a resistor, as shown in figure 7. use the following equation to determine the ideal reset delay time using currents less than 500  a: t delay  2500 i rstb (eq. 1) where: t delay is the ideal reset delay time [ms] i rstb is the current into the rstb pin [  a] using i rstb = 1 ma removes the delay and allows the reset to act as a ?power good? pin. figure 7. reset with adjustable delay on a single pin vout rst rstb r rstb the rstb resistor is commonly tied to vout. depending on the output voltage option, typical delay times can be achieved with the following resistor values: table 4. typical delay times r rstb (k  ) t delay (ms) ? 5 v t delay (ms) ? 3.3 v t delay (ms) ? 2.5 v 5 ? ? 5 10 5 7.6 10 20 10 15 20 30 15 23 ? 50 25 ? ? enable the NCV890430 is designed to accept either a logic-level signal or battery voltage as an enable signal. however, if voltages above 40 v are expected, en should be tied to vin through a 10 k  resistor in order to limit the current flowing into the overvoltage protection of the pin. a low signal on enable induces a shutdown mode which shuts off the regulator and minimizes its supply current to less than 5  a by disabling all functions. once the switching regulator output is enabled, a soft-start is always initiated. thermal shutdown a thermal shutdown circuit inhibits switching and resets the soft-start circuit if internal temperature exceeds a safe level. switching is automatically restored when temperature returns to a safe level. exposed pad the exposed pad (epad) on the back of the package must be electrically connected to both the analog and the power electrical ground gnd and pgnd pins for proper, noise-free operation. it is recommended to connect these 2 pins directly to the epad with a pcb trace. device ordering information device output marking package shipping ? NCV890430mw50txg 5.0 v tbd dfn8 (pb?free) tbd / tape & reel NCV890430mw33txg 3.3 v tbd NCV890430mw25txg 2.5 v tbd ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCV890430 www. onsemi.com 9 package dimensions dfn8, 3x3, 0.65p case 506cs issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 8x 0.10 b 0.05 a c c note 3 2x 0.10 c pin one reference top view 2x 0.10 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 8x 14 5 8 dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.25 0.35 d 3.00 bsc d2 2.30 2.50 e 3.00 bsc e2 1.50 1.70 e 0.65 bsc l 0.30 0.40 ?? ?? ? ? ? ? ?? ?? ?? ?? ? ? ? ? ?? ?? 1 0.65 pitch 3.30 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. recommended 8x dimensions: millimeters l1 detail a l alternate terminal constructions l detail b detail a l1 0.00 0.15 note 4 e/2 soldering footprint* ??? ??? ?? : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NCV890430/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.


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